RS485 Overview

Chapter 1: Overview

Introduction
The purpose of this application note is to describe the main elements of an RS-422 and RS-485 system. This application note attempts to cover enough technical details so that the system designer will have considered all the important aspects in his data system design. Since both RS-422 and RS-485 are data transmission systems that use balanced differential signals, it is appropriate to discuss both systems in the same application note. Throughout this application note the generic terms of RS-422 and RS-485 will be used to represent the EIA/TIA-422 and EIA/TIA-485 Standards.

Data Transmission Signals
Unbalanced Line Drivers
Each signal that transmits in an RS-232 unbalanced data transmission system appears on the interface connector as a voltage with reference to a signal ground. For example, the transmitted data (TD) from a DTE device appears on pin 2 with respect to pin 7 (signal ground) on a DB-25 connector. This voltage will be negative if the line is idle and alternate between that negative level and a positive level when data is sent with a magnitude of ±5 to ±15 volts. The RS-232 receiver typically operates within the voltage range of +3 to +12 and -3 to -12 volts as shown in Figure 1.1.

Figure 1.1 RS-232 Interface Circuit

Balanced Line Drivers
In a balanced differential system the voltage produced by the driver appears across a pair of signal lines that transmit only one signal. Figure 1.2 shows a schematic symbol for a balanced line driver and the voltages that exist. A balanced line driver will produce a voltage from 2 to 6 volts across its A and B output terminals and will have a signal ground (C) connection. Although proper connection to the signal ground is important, it isn't used by a balanced line receiver in determining the logic state of the data line. A balanced line driver can also have an input signal called an “Enable” signal. The purpose of this signal is to connect the driver to its output terminals, A and B. If the “Enable” signal is OFF, one can consider the driver as disconnected from the transmission line. An RS-485 driver must have the “Enable” control signal. An RS-422 driver may have this signal, but it is not always required. The disconnected or "disabled" condition of the line driver usually is referred to as the “tristate” condition of the driver.

Note 1: The term "tristate" comes from the fact that there is a third output state of an RS-485 driver, in addition to the output states of "1" and "0".

Figure 1.2 Balanced Differential Output Line Driver

Balanced Line Receivers
A balanced differential line receiver senses the voltage state of the transmission line across two signal input lines, A and B. It will also have a signal ground (C) that is necessary in making the proper interface connection. Figure 1.3 is a schematic symbol for a balanced differential line receiver. Figure 1.3 also shows the voltages that are important to the balanced line receiver. If the differential input voltage Vab is greater than +200 mV the receiver will have a specific logic state on its output terminal. If the input voltage is reversed to less than -200 mV the receiver will create the opposite logic state on its output terminal. The input voltages that a balanced line receiver must sense are shown in Figure 1.3. The 200 mV to 6 V range is required to allow for attenuation on the transmission line.

Figure 1.3 Balanced Differential Input Line Receiver

EIA Standard RS-422 Data Transmission

The EIA Standard RS-422-A entitled “Electrical Characteristics of Balanced Voltage Digital Interface Circuits” defines the characteristics of RS-422 interface circuits. Figure 1.4 is a typical RS-422 four-wire interface. Notice that five conductors are used. Each generator or driver can drive up to ten (10) receivers. The two signaling states of the line are defined as follows:

When the “A” terminal of the driver is negative with respect to the “B” terminal, the line is in a binary 1 (MARK or OFF) state.

When the “A” terminal of the driver is positive with respect to the “B” terminal, the line is in a binary 0 (SPACE or ON) state.

Figure 1.4 Typical RS-422 4 Wire Network

Figure 1.5 shows the condition of the voltage of the balanced line for an RS-232 to RS-422 converter when the line is in the “idle” condition or OFF state. It also shows the relationship of the “A” and “B” terminals of an RS-422 system and the “-“ and “+” terminal markings used on many types of equipment. The “A” terminal is equivalent to the “-“ designation, and the “B” terminal equivalent to the “+” designation. The same relationship shown in Figure 1.5 also applies for RS-485 systems. RS-422 can withstand a common mode voltage (Vcm) of ±7 volts. Common mode voltage is defined as the mean voltage of A and B terminals with respect to signal ground.

Figure 1.5 - Relationship Between EIA Standard 'A' and 'B' Terminals on RS-422 or RS-485 Device and '+' and '-' Identification Convention
Note: Under 'idle' conditions it is possible to determine which terminal is 'A' and which is 'B'

Figure 1.5 - Relationship Between EIA Standard 'A' and 'B' Terminals on RS-422 or RS-485 Device and '+' and '-' Identification Convention

EIA Standard RS-485 Data Transmission

The RS-485 Standard permits a balanced transmission line to be shared in a party line or multidrop mode. As many as 32 driver/receiver pairs can share a multidrop network. Many characteristics of the drivers and receivers are the same as RS-422. The range of the common mode voltage Vcm that the driver and receiver can tolerate is expanded to +12 to -7 volts. Since the driver can be disconnected or tristated from the line, it must withstand this common mode voltage range while in the tristate condition. Some RS-422 drivers, even with tristate capability, will not withstand the full Vcm voltage range of +12 to -7 volts.

Figure 1.6 shows a typical two-wire multidrop network. Note that the transmission line is terminated on both ends of the line but not at drop points in the middle of the line. Termination should only be used with high data rates and long wiring runs. A detailed discussion of termination can be found in Chapter 2 of this application note. The signal ground line is also recommended in an RS-485 system to keep the common mode voltage that the receiver must accept within the -7 to +12 volt range. Further discussion of grounding can be found in Chapter 3 of this application note.

Figure 1.6 - Typical RS-485 Two Wire Multidrop Network
Figure 1.6 Typical RS-485 Two Wire Multidrop Network

An RS-485 network can also be connected in a four-wire mode as shown in Figure 1.7. Note that four data wires and an additional signal ground wire are used in a “four-wire” connection. In a four-wire network it is necessary that one node be a master node and all others be slaves. The network is connected so that the master node communicates to all slave nodes. All slave nodes communicate only with the master node. This network has some advantages with equipment with mixed protocol communications. Since the slave nodes never listen to another slave response to the master, a slave node cannot reply incorrectly to another slave node.

Figure 1.7 - Typical RS-485 Four Wire Multidrop Network
Figure 1.7 Typical RS-485 Four Wire Multidrop Network

Tristate Control of an RS-485 Device using RTS
As discussed previously, an RS-485 system must have a driver that can be disconnected from the transmission line when a particular node is not transmitting. In an RS-232 to RS-485 converter or an RS-485 serial card, this may be implemented using the RTS control signal from an asynchronous serial port to enable the RS-485 driver. The RTS line is connected to the RS-485 driver enable such that setting the RTS line to a high (logic 1) state enables the RS-485 driver. Setting the RTS line low (logic 0) puts the driver into the tristate condition. This in effect disconnects the driver from the bus, allowing other nodes to transmit over the same wire pair. Figure 1.8 shows a timing diagram for a typical RS-232 to RS-485 converter. The waveforms show what happens if the VRTS waveform is narrower than the data VSD. This is not the normal situation, but is shown here to illustrate the loss of a portion of the data waveform. When RTS control is used, it is important to be certain that RTS is set high before data is sent. Also, the RTS line must then be set low after the last data bit is sent. This timing is done by the software used to control the serial port and not by the converter.

When an RS-485 network is connected in a two-wire multidrop party line mode, the receiver at each node will be connected to the line (see Figure 1.6). The receiver can often be configured to receive an echo of its own data transmission. This is desirable in some systems, and troublesome in others. Be sure to check the data sheet for your converter to determine how the receiver “enable” function is connected.

Note 1 - Voltage here is determined by other devices on the line
Note 2 - All peak values of voltages are approximate
Figure 1.8 - Timing Diagram for RS-232 to RS-485 Converter with RTS Control of RS-485 Driver and Receiver

Send Data Control of an RS-485 Device
Many of B&B Electronics’ RS-232 to RS-485 converters and RS-485 serial cards include special circuitry, which is triggered from the data signal to enable the RS-485 driver. Figure 1.9 is a timing diagram of the important signals used to control a converter of this type. It is important to note that the transmit data line is “disabled” at a fixed interval after the last bit, typically one character length. If this interval is too short, you can miss parts of each character being sent. If this time is too long, your system may try to turn the data line around from transmit to receive before the node (with the Send Data converter) is ready to receive data. If the latter is the case, you will miss portions (or complete characters) at the beginning of a response.

Figure 1.9 - Timing Diagram for RS-232 to RS-485 Converter with Send Data (SD) Control of RS-485 Driver and Receiver
Note 1 - Voltage here is determined by other devices on the line
Note 2 - This timing interval detremined by components in timing ciruit. The start of this interval is determined by the leading edge of each data bit
Note 3 - All peak values of voltages are approximate
Figure 1.8 - Timing Diagram for RS-232 to RS-485 Converter with Send Data (SD) Control of RS-485 Driver and Receiver